Apple Digital Layout Designer in Santa Clara Valley, California

Digital Layout Designer

Job Number: 52098310

Santa Clara Valley, California, United States

Posted: 20-Apr-2017

Weekly Hours: 40.00

Job Summary

As a member of Apple’s custom layout team, you will be working on the latest technology nodes to create world-class custom digital macros, libraries, etc. This is a fast paced work environment with endless learning opportunities working in the design team with members of integration, CAD, circuit and technology engineering.

Key Qualifications

  • Typically requires 10+ years experience in custom layout design of deep SubMicron CMOS circuits used in high performance microprocessors.

  • Experience designing low noise, low power resistors, capacitors, pad IOs, ESD structures, datapaths, memory structures, etc.

  • High level proficiency in layout floorplanning, standard cell planning and hierarchical layout assembly.

  • Must understand issues of RC delay, electromigration, self heating and cross capacitance.

  • Must recognize failure prone circuit and layout structures, proactively work with circuit designer for best approach to problems.

  • High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.

  • Knowledge of MENTOR GRAPHICS or CADENCE layout tools.

  • Scripting skills in PERL or SKILL or AMPLE are considered a plus, but not required.

  • Excellent communication skills and able to work with cross-functional teams.

Description

As a member of the layout team of the microprocessor group you will be responsible to deliver PDV clean layout, this includes the following:

•Designing complex layout for mixed signal, and digital circuits in deep SubMicron CMOS technologies.

•Reviewing and analyzing floorplans and complex circuits with circuit designer.

•Running complete set of design verification tools available on megacells completed.

•Working with circuit design team to plan, schedule work and negotiate any necessary layout tradeoffs as needed.

•Interpretation of LVS, DRC and ERC report to find fastest way to complete layout.

•Exceed engineering specifications and expectations working with the circuit design team.

•Utilizing advanced CAD tools, mask design knowledge to layout correct and robust physical design representation of circuits.

Education

BS Degree, or equivalent.

Additional Requirements